Development Implementation Documentation FPGAs Engineer (Jobs in Milpitas, CA)   Requirement id 107650 Job title Engineer Job location in MILPITAS, CA Skills required Written And Verbal Communication Skills, Development, Implementation, Documentation FPGAs Open Date 22-Jun-2020 Close Date Job type Contract Duration 3 Months Compensation DOE Status requirement not found Job interview type --- Apply    Email Recruiter: coolsoft Job Description Engineer: Written And Verbal Communication Skills, Development, Implementation, Documentation FPGAs Candidate must be our W2 Employee. Candidate must be local : Yes We should submit only GC,GC - EAD, L2-EAD,H4-EAD and Citizens. Job Description : Job Title: Engineering - Elec Des Engr 5 Start/End Dates: 7/6/2020 - 10/5/2020 Worker Location: Milpitas, CA Job Description: Designs electrical parts, modules and subsystems to support the design of whole systems. Responsible for the complete design process, including requirements specification, feasibility studies, cost and scheduling, conducting various analysis, such as circuit, timing, thermal/cooling, electrical loads and FPGA modeling, conceptual and detailed design using design tools (i.e. OrCAD, PSpice, Xilinx/Altera FPGA /EPLD development systems, etc...), detailed drawings, design review presentations, procurement of prototype parts, system integration, prototype testing, and handoff to manufacturing. These tasks will require working with other engineering groups such as ME, OE, SW, systems and manufacturing engineers to ensure flawless integration and test at the subsystem and system level. Develops the required supporting documentation, such as assembly and test procedures, and service manuals. Works closely with and manages suppliers to ensure all design requirements are specified and achieved. Addresses and resolves product issues thru the product phases. Has strong leadership, communication and problem solving skills. Responsibilities Design FPGA based high speed PCB, including circuit design, schematic capture, simulation and layout review. FPGA design support, work with FPGA engineer for designing the testbenches, functional and/or post layout simulations, timing analysis/closure, FPGA functionality verification and validation. Understand and capture the project specifications and performance requirements on board and system level. Write technical documentation that meets the defined quality standards for manufacturing / service team as required. Qualifications: Team player with excellent written and verbal communications skills Solid knowledge of electrical engineering principles, analog digital and mixed signal electronics design both at the theoretical and implementation level. Experience in the design, development and integration of complex boards and subsystems (including PCBs, Cables, System interconnect). Familiar with FPGA development tools, such as Vivado or Quartus software. Hands on experience with lab equipment like logic analyzer, oscilloscope etc. Experience with FPGA (Xilinx UltraScale or Intel Aria 10) development and using complex FPGA IPs such as embedded processors (ARM/MicroBlaze), Ethernet MAC and DDR memory controller is a plus.   Call 502-379-4456 Ext 100 for more details. Please provide Requirement id: 107650 while calling.   Other jobs in CA: Anaheim (4), Brea (3), Brisbane (2), Carlsbad (3), Concord (1), Culver City (1), Cupertino (5), Downtown Los Angeles (3), El Monte (3), El Segundo (1), Foothill Ranch (2), Irvine (1), La Jolla (2), Lake Forest (1), Larkspur Landing (1), Long Island (1), Los Angeles (27), Newport (1), Newport Beach (3), Orange (2), Orange County (7), Pasadena (1), Poway (5), Rancho Cordova (1), Redwood City (3), Sacrament (1), Sacramento (19), San Diego (87), San Francisco (24), San Jose (4), Simi Valley (1), South San Francisco (1), Westlake Village (2),    Written And Verbal Communication Skills job openings in other states Jobs List Info. Sys. Applications Analyst II - RFS 66391 Create date: 22-Sep-2026 Start date :10/19/2026 End Date :04/19/2027 Submission deadline :Due to SCS 09/28/2026 by 8:00 A.M. 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